Dr. Rishikesh Pandey
Assistant Professor

Designation:

Assistant Professor

Specialization:

VLSI Design

Email:

rpandey@thapar.edu

Education

  • Ph. D.: University of Delhi, Delhi, India Title of the thesis: An Investigation into FGMOS Circuits for Signal Processing
  • M. Tech.: U. P. Technical University, Lucknow, India Dissertation Topic: Implementation of Spread Spectrum Modulator on FPGA

Experience

  • June 2009 - till date: Assistant Professor, ECED, Thapar Institute of Engineering & Technology, Patiala.
  • August 2006 - June 2009: TRF, ECED, NSIT, New Delhi.
  • July 2007- June 2009: Assistant Professor (on leave), ECED, CET, IFTM, Moradabad.
  • August 2004- June 2007: Lecturer, ECED, CET, IFTM, Moradabad.
  • October 2003 - July 2004: Lecturer, ECED, B.I.T. Muzaffarnagar.

SCI Publications

  • R. Pandey, and M. Gupta, "Low-Voltage FGMOS Based Voltage-to-Current Converter," Journal of Microelectronics, Electronic Components and Materials. Vol. 43, no. 3, pp. 173 - 178, 2013.
  • M. Gupta, and R. Pandey, "Low-Voltage FGMOS Based Analog Building Blocks," Microelectronics Journal, Elsevier, vol. 42, no. 6, pp. 903-912, 2011.
  • R. Pandey, and M. Gupta, "FGMOS Based Tunable Grounded Resistor," Journal of Analog Integrated Circuits and Signal Processing, Springer, vol. 65, no. 3, pp. 437-443, 2010.
  • R. Pandey and M. Gupta, "FGMOS Based Voltage-Controlled Grounded Resistor," Radioengineering journal, vol. 19, no. 3, pp. 455-459, 2010.
  • M. Gupta and R. Pandey, "FGMOS Based Voltage-Controlled Resistor and Its Applications," Microelectronics Journal, Elsevier, vol. 41, no. 1, pp. 25-32, 2010.