Dr. Bharat Garg




Signal Processing



Contact No.

+91-9407-363-919, +91-7974-677-918

Membership of Professional Institutions, Associations, Societies

Student Member, IEEE, from June 2017- till date

Publications and other Research Inputs


  1. Bharat Garg, Sunil Dutt, and G. K. Sharma "Bit-width-aware constant-delay run-time Accuracy Programmable Adder for error-resilient applications" Microelectronics Journal, Elsevier 2016, Vol. 50, pp. 1-7
  2. Bharat Garg, and G. K. Sharma "A quality-aware Energy-scalable Gaussian Smoothing Filter for image processing applications" Microprocessors and Microsystems Elsevier (2016) Vol. 45, pp. 1-9.
  3. Nawandar, Neha, Bharat Garg, and G. K. Sharma, “RICO: A low power Repetitive Iteration CORDIC for DSP applications in portable devices”, System Architecture, Elsevier 2016, Vol 70, pp. 82-92.
  4. Bharat Garg and G. K. Sharma, “ACM: An Energy-efficient Accuracy Configurable Multiplier for Error-resilient Applications”, Journal of Electronics Testing, vol. 34, pp. 1-11, 2017.

Awards and Honours

  1. Got Design Productivity Win for “Automate Test Generation” at Cypress Semiconductors.
  2. Qualified GATE-2004, GATE-2012, GATE-2016, UGC-NET 2013, and UG-NET 2014

Description of Research Interests

  • Energy Efficient VLSI Architectures for Signal Processing Applications
  • Hardware Security